The present invention relates in general to integrated circuitry and in particular to method and circuitry for implementing programmable on-chip termination impedance.
To minimize signal reflection that causes signal distortion and degrades overall signal quality, transmission lines are resistively terminated. In the case of integrated circuits that are in communication with other circuitry on a circuit board, termination is often accomplished by coupling an external termination resistor to the relevant input/output (I/O) pins. The use of external components for termination purposes can be cumbersome and costly, especially in the case of an integrated circuit with numerous I/O pins.
A termination resistor is typically coupled to every I/O pin receiving input on a transmission line. Often hundreds of termination resistors are needed for an integrated circuit. Numerous external termination resistors can consume a substantial amount of board space.
It is therefore desirable to provide on-chip termination resistance to eliminate external components. It is further desirable to make on-chip termination resistance insensitive to process, voltage supply, and temperature variations of an integrated circuit.
The present invention provides various embodiments for efficient, flexible and cost-effective implementations of series on-chip termination impedance (e.g., resistance). In one embodiment, the invention comprises an integrated circuit with two off-chip reference resistors and internal calibration circuitry. The calibration circuitry controls termination transistors coupled to input/output (I/O) pins of the integrated circuit. The termination transistors behave as programmably adjustable termination resistors that match the impedance of the external reference resistors.
By using only a small number of reference resistors (e.g., 2 resistors) for a large number of I/O pins, the present invention eliminates the external components otherwise needed to provide termination impedance. In the present invention, the effective series termination impedance may be programmed, enabling the termination impedance to meet different I/O standards. Further, the termination impedance techniques of the present invention are not sensitive to process, voltage supply, and temperature (PVT) variations of the integrated circuit.